Study of Parallel Prefix Adders |
Author(s): |
| Boopathiraja K , Bannari Amman Institute of Technology; Gowthamraj M, Bannari Amman Institute of Technology; Danielraj A, Bannari Amman Institute of Technology; Tamilselvan S, Bannari Amman Institute of Technology |
Keywords: |
| Parallel Prefix Adders, Arithmetic Logic Unit (ALU), Integrated Software Environment (ISE) |
Abstract |
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All the processors nowadays contain microprocessors which has CPUs and GPUs contain an Arithmetic Logic Unit (ALU). The overall efficiency of modern-day processors mainly depends on the efficiency of the ALU. The adders are the basic building blocks for an ALU, which is used to perform arithmetic and logic operations. Addition has been a key activity in the vast majority of the broadly utilized applications. In this paper we had done the comparative study of 4 different parallel prefix adders like Kogge Stone Adder, Brent Kung Adder, Lander Fischer Adder and Ling Adder. They have been categorized and ranked as per delay, device utilization and cell usage. These adders are implemented in Verilog Hardware Description Language using Xilinx Integrated Software Environment (ISE) Design Suite and implemented. |
Other Details |
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Paper ID: IJSRDV8I10348 Published in: Volume : 8, Issue : 1 Publication Date: 01/04/2020 Page(s): 252-254 |
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