FIR Filter Design with Reconfigurable Constant Multiplication Circuit Optimized using OSR Method

FIR filters are used to implement almost any type of digital frequency response and are widely used in digital communications, software-defined radios, adaptive filters, multi-rate signal processing etc. To optimize these filters, different multiplication techniques or optimization techniques for these multipliers has been approached as it is the basic operation in different areas of the digital computations like in signal processing task, high speed integrated circuits and application-specific ICs. Optimizing the multipliers helps decrease the device parameters and increase the performance. So the necessity of high speed and low power multipliers has increased. This paper introduces the application of a computationally efficient Optimal Shift Reassignment method to optimize the hardware architecture for Re-configurable Constant Multiplication (RCM) block to replace the multiplier of an FIR filter. Optimal shift reassignment (OSR) is used in RCM circuits to reduce the number of required multiplexers in the circuit. Using the OSR method, the shift values of different inputs of a multiplexer can be realigned. In this project a RCM block is designed and then optimized using OSR method for the multiplication circuitry in FIR filter. The design is done using the tool Xilinx13.2. Filters are dynamically reconfigured by modifying the filter’s coefficients. Coding is done using VHDL and simulation is verified using Xilinx ISE Design Suite.